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| (R) ISL88694 Data Sheet January 21, 2005 FN8239.1 SMBus Accelerator (SMA) The ISL88694 SMBus accelerator (SMA) is a dual active pull-up bus terminator designed to improve data transmission speed on SMBus or similar 2-wire serial bus interfaces. The ISL88694 is also compatible to the I2C serial bus. The SMA detects rising input transitions with two internal voltage references and two comparators per channel. After the voltage on a data line crosses the first threshold (VTRIPL), the boost pull-up current source is activated to speed transition. After the voltage crosses the second threshold (VTRIPH), the boost pull-up current source is deactivated, leaving an active pull-up current of 275A on the line. When both channels are HIGH, the pull-up current for both lines is reduced to 100A to save power. Internal logic ensures that the active and boost pull-up current sources are not activated during downward transitions. The level for VTRIPH is controlled by a bandgap voltage referred to VDD. This feature makes the switching behavior invariant for all power supply voltages between 2.7V and 5.5V. A noise filter on each channel prevents the circuit from responding to input transitions that do not exceed a voltagetime threshold. To activate the boost circuit, the input must exceed VTRIPL by 100Vns (typical) (See Figure 10). The SMA permits operation of the bus at frequencies up to 100kHz, despite the capacitive loads of multiple devices and/or long PC board traces. Enhanced ESD protection on the accelerator pins are guaranteed to withstand 8kV ESD (HBM) events. The SMBus Accelerator provides an essential function in SMBus applications because of distributed capacitance of SMBus and multiple device input capacitances at various nodes. By incorporating SMA, systems using SMBus or I2C can reliably increase their bus load without the risk of data loss. Features * Active Termination for SMBus lines * Enhances System Bus Signal Rise Time * Increases Bus Capacity While Guaranteeing Data Integrity * 2.2mA Rise Time Supply Current * 8kV ESD Protection on SDA and SCL Pins * Wide Operating Voltage Range: 2.7V to 5.5V * 2-Wire SMBus and I2C Compatible (100kHz) * Small Package - SOT23-5 * Pin-for-Pin Compatible with the LTC1694 * Pb-Free Available (RoHS Compliant) Target Applications * Servers * Data Acquisition * Routers * Battery Chargers * Portable Instrumentation * Notebook * PC * Facilities Tracking System Pinout ISL88694 (5 LD SOT-23) TOP VIEW VDD GND N.C. 1 2 3 5 SMBus1 4 SMBus2 Ordering Information PART NUMBER ISL88694IH5 PACKAGE 5-pin SOT TEMP RANGE (C) -40 to 85 -40 to 85 ISL88694IH5Z (Note) 5-pin SOT (Pb-Free) Add "-TK" suffix for tape and reel. NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL88694 Pin Descriptions SOT-23 1 2 3 4 5 SYMBOL VDD GND N.C. SMBus1 SMBus2 Supply Voltage Ground No Connect Active Pull-Up for SMBus Active Pull-Up for SMBus DESCRIPTION System Diagram ISL88694 VDD SMBus1 SMBus2 GND BUS SIGNALS DATA CLK Devices; SBS, PCI, Compact PCI, PMCI, ACPI, ICMB, IPMI, IPMB,SMBus, I2C, 2-Wire. CLK IN CLK OUT DATA IN CLK IN CLK OUT DATA IN DATA OUT DATA OUT Device 1 Device N IC Block Diagram VDD 1.825mA 175A 100A VTRIPH= VDD-0.5V SMBus1 Control + Control + VTRIPL= 8kV ESD Protection 8kV ESD Protection 0.75V VTRIPL= 0.75V 2 + + VTRIPH= VDD-0.5V SMBus2 1.825mA 175A 100A VDD GND FN8239.1 January 21, 2005 ISL88694 Absolute Maximum Ratings Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to 6.5V Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Voltage on pins . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . . . 300C ESD min other pins (HBM). . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2kV ESD SMBus1 and SMBus2 pins (HBM) . . . . . . . . . . . . . . . . . .>8kV Recommended Operating Conditions Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V CAUTION: Absolute Maximum Ratings indicate limits beyond which permanent damage to the device and impaired reliability may occur. These are stress ratings provided for information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification are not implied. For guaranteed specifications and test conditions, see Electrical Specifications. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Electrical Specifications SYMBOL Over operating conditions unless otherwise specified, Typical values are measured at VDD = 3.3V and TA = +25C CONDITIONS MIN TYP MAX UNIT PARAMETER ANALOG PARAMETERS VDD Supply Voltage Range 2.7 0.05 SMBus1=SMBus2=Open SMBus1=SMBus2=VDD-1.0V SMBus1=GND; SMBus2=Open SMBus1= Open; SMBus2=GND Boost Pull-Up Current (Figure 1) VTRIPL 1. Measured as area under triangular waveform above VTRIPL, with time as base and VIN as height (See Figure 10). 3 FN8239.1 January 21, 2005 ISL88694 Typical Performance Curves 370 ACTIVE PULL-UP CURRENT, IOUT_A (A) BOOST PULL-UP CURRENT, IOUT_B (A) 350 330 310 290 270 250 230 210 -60 VDD=2.7V VDD=5.5V 3.75 2.60 2.45 2.30 2.15 2.00 1.85 1.70 1.55 -60 VDD=2.7V VDD=5.5V -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 TEMPERATURE (C) TEMPERATURE (C) FIGURE 1. ACTIVE PULL-UP CURRENT. SMBus PIN=0V FIGURE 2. BOOST PULL-UP CURRENT. SMBus PIN = VDD/2. 120 STANDBY PULL-UP CURRENT, IOUT_SB (A) INPUT THRESHOLD LOW, VTRIPL (V) 110 100 90 VDD=5.5V 80 70 60 50 40 -60 VDD=2.7V 0.95 0.90 0.85 0.80 0.75 0.70 0.65 0.60 0.55 -60 VDD=5.5V VDD=2.7V -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 TEMPERATURE (C) TEMPERATURE (C) FIGURE 3. STANDBY PULL-UP CURRENT. SMBus1,2=VDD-0.5V FIGURE 4. VTRIPL VOLTAGE 4 FN8239.1 January 21, 2005 ISL88694 Typical Performance Curves 0.70 INPUT THRESHOLD HIGH, VTRIPH (VDD-V) 0.65 0.60 0.55 0.50 0.45 0.40 0.35 0.30 -60 VDD=5.5V VDD=2.7V SUPPLY CURRENT, IDD (A) (Continued) 95 90 85 VDD=5.5V 80 75 70 65 60 55 -60 VDD=2.7V -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 TEMPERATURE (C) TEMPERATURE (C) FIGURE 5. VTRIPH VOLTAGE FIGURE 6. IDD CURRENT. SMBus1=SMBus2=OPEN. 3.5 BOOST PULL-UP CURRENT, IOUT_B (mA) 3.0 2.5 VDD=5.0V 2.0 1.5 VDD=2.7V 1.0 0.5 0 0 1 2 3 4 5 6 SMBus VOLTAGE (V) FIGURE 7. BOOST PULL-UP CURRENT vs. SMBus VOLTAGE Functional Description SMBus Overview The SMBus or I2C bus is a 2-wire multimaster bus, meaning that more than one device connected to the bus is capable of controlling it. Master devices communicate to other master or slave devices using one clock and one data line. These are both bidirectional. In order to allow multimaster operation without bus contention, it is necessary to allow each bus to be connected to a positive supply voltage via a current-source or pull-up resistor (see "System Diagram" on page 2). When the bus is free, both lines are HIGH. The output stages of devices connected to the bus must have an open-drain or opencollector to perform the wired-AND function. Simple pull-up resistors on the clock and data lines work well unless there are long signal lines or many devices connected to the bus. Then, the combined capacitance of the bus increases the rise time on the signal to such an extent that the communication becomes unreliable or fails to meet the bus timing specifications. Smaller resistors can sometimes compensate for the extra capacitance, but this increases the current consumption when the signal lines are pulled LOW. 5 FN8239.1 January 21, 2005 ISL88694 ISL88694 Operation To improve the operation of the SMBus where larger bus capacitance exists, the ISL88694 provides active pull-up using switched current sources. When the bus is idle and both lines are HIGH, a standby pull-up current of 100A is used to maintain the signal level while minimizing power consumption. When either of the two signals is pulled LOW, an active pull-up current of 275A maintains a good VOL noise margin. When the bus line is released, it is pulled high by the ISL88694 active current until the voltage exceeds the VTRIPL level for a period of time. This voltage-time combination filters out noise on the signal line. Once the ISL88694 detects a valid rising edge, a 2.2mA boost current pulls the bus line high very quickly (see Figure 8). This boost current turns off when the input level reaches the VTRIPH threshold and the pull-up current returns to the active level. If both inputs are HIGH, the pull-up current drops to the standby level of 100A. With ISL88694 SMA VTRIPH VTRIPH With SMA With ISL88694 SMA VTRIPH With RC Pullup VTRIPL R=15.8K C= 200pF FIGURE 9. ISL88694 SMBus SYSTEM BOOST PULL-UP COMPARED TO RESISTOR PULL-UP (VDD = 2.7V). VDD Without SMA With RC Pullup VTRIPL VTRIPL R=15.8K C= 200pF Gnd SMBus1 SMBus2 >20Vns (Typical) t FIGURE 8. ISL88694 SMBus SYSTEM BOOST PULL-UP COMPARED TO RESISTOR PULL-UP (VDD = 5.5V). FIGURE 10. NOISE SUPPRESSION. BOOST CURRENT APPLIED WHEN INPUT SIGNAL EXCEEDS 20Vns (TYPICAL). 6 FN8239.1 January 21, 2005 ISL88694 Package Outline Drawing 5-Lead, SOT23, Package Code H5 0.007 (0.20) B 0.0006 (0.15) 0.054 (1.38) BSC 0.065 (1.65) 0.061 (1.55) 0.108 (2.75) BSC B C L 4X 0.35 H A-B D 0.35 C A-B D 2X N/2 TIPS 1 0.075 (1.90) BSC 3 12 REF. TYP. 0.118 (3.00) 0.110 (2.80) 0.033 (0.85) 0.035 (0.90) 0.038 (0.95) BSC Parting Line Seating Plane 0.0008 (0.02) 0.0040 (0.10) 0.043 (1.10) MAX 0-8C 0.575 REF. 0.10 R MIN. 0.20 in 0.10 R MIN. SEATING PLANE .019 (0.50) .012 (0.30) NOTES: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 3. DIMENSIONING AND TOLERANCES PER ASME, Y14.5-1994 4. THIS PART IS COMPLIANT WITH JEDEC SPECIFICATION MO-193. 5. THIS PART IS FULL COMPLIANCE TO EIAJ SPECIFICATION SC-74 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 7 FN8239.1 January 21, 2005 |
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